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stm32f030k6t6 clock setup register

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iodo23
(@iodo23)
Posts: 2
New Member
Topic starter
 

don´t have topic stm32f0, i know this is stm32f1 topic. i want configure the clock of stm32f030k6t6 using register and gpio for blink led,but not do led blink when execute. i want use internal clock with 48 mhz.  i have the next code in stm32cube ide:

 

/**
 ******************************************************************************
 * @file           : main.c
 * @author         : Auto-generated by STM32CubeIDE
 * @brief          : Main program body
 ******************************************************************************
 * @attention
 *
 * Copyright (c) 2022 STMicroelectronics.
 * All rights reserved.
 *
 * This software is licensed under terms that can be found in the LICENSE file
 * in the root directory of this software component.
 * If no LICENSE file comes with this software, it is provided AS-IS.
 *
 ******************************************************************************
 */

#include <stdint.h>
#include <stm32f0xx.h>



/*
#if !defined(__SOFT_FP__) && defined(__ARM_FP)
  #warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use."
#endif
*/

void systme_clk()
{

	/* 48 Mhz HSI PLL configuration */
	/***********************************************************/
	// HSI RC
	// HSI PLL ON
	// CONFIGURATE PLL MULTIPLEXOR
	//

	/**********************************************************/


	/* 32MHz HSI PLL Configuration */
		RCC->CR &= ~RCC_CR_PLLON; /* Keep PLL off */

		RCC->CFGR &= ~RCC_CFGR_PLLSRC_Msk;
		RCC->CFGR |= RCC_CFGR_PLLSRC_HSI_DIV2;

		RCC->CFGR &= ~RCC_CFGR_PLLMUL_Msk;
		//RCC->CFGR |= RCC_CFGR_PLLMUL8;
		RCC->CFGR |= RCC_CFGR_PLLMUL12;

		RCC->CR |= RCC_CR_PLLON; /* Turn PLL on */
		while ((RCC->CR & RCC_CR_PLLRDY) == 0); /* Wait for PLL to be ready */

		RCC->CFGR &= ~RCC_CFGR_HPRE_Msk; /* Clear AHB resister */
		RCC->CFGR |= RCC_CFGR_HPRE_DIV1; /* AHB Prescaler */

		RCC->CFGR &= ~RCC_CFGR_PPRE_Msk; /* Clear APB1 resister */
		RCC->CFGR |= RCC_CFGR_PPRE_DIV1; /* APB1 Prescaler */

		RCC->CFGR &= ~RCC_CFGR_SW_Msk; /* Clear SW resister */
		RCC->CFGR |= RCC_CFGR_SW_PLL; /* Set PLL as system clock */
}
void GPIO_Init(void)
{
	RCC->AHBENR |= RCC_AHBENR_GPIOAEN; /* Enable GPIOA clock */
	GPIOA->MODER |= (1<<24);  // pin PA12(bits 11:10) as Output (01)
	GPIOA->OTYPER &= ~(1<<12);  // bit 12=0 --> Output push pull
	GPIOA->OSPEEDR |= (1<<25);  // Pin PA12 (bits 25:24) as Fast Speed (1:0)
	GPIOA->PUPDR &= ~((1<<24) | (1<<25));  // Pin PA12 (bits 25:24) are 0:0 --> no pull up or pulldown



	//RGB_DATA_GPIO_Port->MODER |= 0x02U << (RGB_DATA_Pin << 1); /* Alternate function mode */
	//RGB_DATA_GPIO_Port->AFR[11] |= 5U << (RGB_DATA_Pin << 2); /* Alternate function (TIM16_CH1 AF5) */
	//RGB_DATA_GPIO_Port->OSPEEDR |= 0b11 << (RGB_DATA_Pin << 1); /* output high-speed */
}
void Delay(uint32_t time)
{
	while(time--);
}


int main(void)
{

	systme_clk();
	//SystemInit();

	GPIO_Init();



    /* Loop forever */
		while(1)
		{
			//GPIOA->BSRR |= (1<<12); // Set the Pin PA12
					GPIOA->ODR = 1<<12;
					Delay (100000000);  // random delay
			//		GPIOA->BSRR |= (1<<5) <<16;  // Clear the Pin PA5
					GPIOA->ODR &= ~(1<<12);
					Delay (100000000);  // random delay

		}
}

// CONFIGURATE GPIO A AS  OUTPUT

//* 1._ CONFIGURE GPIOA CLOCK:
		// The GPIO clock can be enabled in the RCC_AHB1ENR Register,
		//As you can see above, the 0th bit of RCC_AHB1ENR Register enables the clock for the GPIOA. That’s why we need to write a 1 in the 0th position
		//  RCC->AHB1ENR |= (1<<0);  // Enable the GPIOA clock //

//* 2._ SET THE PIN PA12 AS OUTPUT

	// Como estoy usando el pin PA5, necesito modificar los pines 10 y 11. Esto básicamente funciona como, si el PIN es 'P', necesitamos configurar los bits '2*P' y '2*P +1'
	// EXAMPLE PIN5---> REGISTER  2*5 AND 2*5+1 ----> (11,10) ---> AND (01)
	// EXAMPLE PIN12 --> REGISTER 2*12 AND 2*12+1 ---> (25,24) ---> AND (01)
	// Además, para establecer el pin como salida, necesitamos establecer los bits (11:10) como 0:1. Esto significa que necesitamos escribir un '1' en la 10ª posición.
	// GPIOA->MODER |= (1<<10);  // pin PA5(bits 11:10) as Output (01)


//* 3._ CONFIGURE THE OUTPUT MODE, OUTPUT TYPE, SPEED, AND PULL

/*****************************************************************************************************************************************/
	// El tipo de salida se puede configurar en el Registro GPIOx_OTYPER:
	// En las palabras más simples, la diferencia entre el Push-Pull y el Drain abierto se puede entender de la siguiente manera
	// Si elige el drenaje abierto, entonces el pin de salida puede ser LOW (Gnd) o puede ser flotante, mientras que si elige Push-Pull,
	// el pin de salida puede ser HIGH o LOW.

	// Como quiero parpadear el LED en el pin PA12, elegiré la salida de tipo push-pull, y para hacerlo, necesito escribir un '0' en la 12ª posición:
	// GPIOA->OTYPER &= ~(1<<12);  // bit 12=0 --> Output push pull.
/***************************************************************************************************************************************/
	// la velocidad de salida se puede configurar en el Registro GPIOx_OSPEEDR
	// Aquí puede seleccionar diferentes velocidades para el pin de salida, según sus requisitos. La velocidad GPIO controla la
	// velocidad a la que una señal puede cambiar entre valores bajos/altos (el "tiempo de subida" y el "tiempo de caída").
	// Quiero que la velocidad no sea demasiado alta ni demasiado baja, así que elegiré la velocidad rápida. Para hacerlo, necesito escribir 1:0 en bits (25:24)---> (2Y+1,2Y)
	//GPIOA->OSPEEDR |= (1<<25);  // Pin PA12 (bits 25:24) as Fast Speed (1:0)

/**************************************************************************************************************************************/

	// el paso final es configurar el registro pull-up/pull-down (GPIOx_PUPDR).
	// Aquí podemos Pull-up el pin a Vcc o Pull-down a tierra, según el requisito. Como estoy usando el pin para parpadear LED
	// no usaré el Pull-up o Pull-down. Estableceré los bits (11:10) como 0
	// GPIOA->PUPDR &= ~((1<<24) | (1<<25));  // Pin PA12 (bits 25:24) are 0:0 --> no pull up or pulldown

/**************************************************************************************************************************************/
//******************************* FINALIZA LA CONFIGURACION PARA PA12 COMO SALIDA *************************************************/


/**
  ******************************************************************************
  * @file    system_stm32f0xx.c
  * @author  MCD Application Team
  * @brief   CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
  *
  * 1. This file provides two functions and one global variable to be called from
  *    user application:
  *      - SystemInit(): This function is called at startup just after reset and
  *                      before branch to main program. This call is made inside
  *                      the "startup_stm32f0xx.s" file.
  *
  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
  *                                  by the user application to setup the SysTick
  *                                  timer or configure other parameters.
  *
  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
  *                                 be called whenever the core clock is changed
  *                                 during program execution.
  *
  *
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  * All rights reserved.</center></h2>
  *
  * This software component is licensed by ST under BSD 3-Clause license,
  * the "License"; You may not use this file except in compliance with the
  * License. You may obtain a copy of the License at:
  *                        opensource.org/licenses/BSD-3-Clause
  *
  ******************************************************************************
  */

/** @addtogroup CMSIS
  * @{
  */

/** @addtogroup stm32f0xx_system
  * @{
  */

/** @addtogroup STM32F0xx_System_Private_Includes
  * @{
  */

#include "stm32f0xx.h"

/**
  * @}
  */

/** @addtogroup STM32F0xx_System_Private_TypesDefinitions
  * @{
  */

/**
  * @}
  */

/** @addtogroup STM32F0xx_System_Private_Defines
  * @{
  */
#if !defined  (HSE_VALUE)
  #define HSE_VALUE    ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
                                                This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */

#if !defined  (HSI_VALUE)
  #define HSI_VALUE    ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
                                                This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */

#if !defined (HSI48_VALUE)
#define HSI48_VALUE    ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in Hz.
                                                 This value can be provided and adapted by the user application. */
#endif /* HSI48_VALUE */
/**
  * @}
  */

/** @addtogroup STM32F0xx_System_Private_Macros
  * @{
  */

/**
  * @}
  */

/** @addtogroup STM32F0xx_System_Private_Variables
  * @{
  */
  /* This variable is updated in three ways:
      1) by calling CMSIS function SystemCoreClockUpdate()
      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
         Note: If you use this function to configure the system clock; then there
               is no need to call the 2 first functions listed above, since SystemCoreClock
               variable is updated automatically.
  */
uint32_t SystemCoreClock = 8000000;

const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};

/**
  * @}
  */

/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes
  * @{
  */
static void SetSysClock(void);
/**
  * @}
  */

/** @addtogroup STM32F0xx_System_Private_Functions
  * @{
  */

/**
  * @brief  Setup the microcontroller system
  * @param  None
  * @retval None
  */
void SystemInit(void)
{
	/* Set HSION bit */
	  RCC->CR |= (uint32_t)0x00000001;

	  /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */
	  RCC->CFGR &= (uint32_t)0xF8FFB80C;

	  /* Reset HSEON, CSSON and PLLON bits */
	  RCC->CR &= (uint32_t)0xFEF6FFFF;

	  /* Reset HSEBYP bit */
	  RCC->CR &= (uint32_t)0xFFFBFFFF;

	  /* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
	  RCC->CFGR &= (uint32_t)0xFFC0FFFF;

	  /* Reset PREDIV1[3:0] bits */
	  RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;

	  /* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */
	  RCC->CFGR3 &= (uint32_t)0xFFFFFEAC;

	  /* Reset HSI14 bit */
	  RCC->CR2 &= (uint32_t)0xFFFFFFFE;

	  /* Disable all interrupts */
	  RCC->CIR = 0x00000000;

	  /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */
	  SetSysClock();
}

/**
   * @brief  Update SystemCoreClock variable according to Clock Register Values.
  *         The SystemCoreClock variable contains the core clock (HCLK), it can
  *         be used by the user application to setup the SysTick timer or configure
  *         other parameters.
  *
  * @note   Each time the core clock (HCLK) changes, this function must be called
  *         to update SystemCoreClock variable value. Otherwise, any configuration
  *         based on this variable will be incorrect.
  *
  * @note   - The system frequency computed by this function is not the real
  *           frequency in the chip. It is calculated based on the predefined
  *           constant and the selected clock source:
  *
  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
  *
  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
  *
  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
  *
  *         (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
  *             8 MHz) but the real value may vary depending on the variations
  *             in voltage and temperature.
  *
  *         (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (its value
  *              depends on the application requirements), user has to ensure that HSE_VALUE
  *              is same as the real frequency of the crystal used. Otherwise, this function
  *              may have wrong result.
  *
  *         - The result of this function could be not correct when using fractional
  *           value for HSE crystal.
  *
  * @param  None
  * @retval None
  */
void SystemCoreClockUpdate (void)
{
  uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;

  /* Get SYSCLK source -------------------------------------------------------*/
  tmp = RCC->CFGR & RCC_CFGR_SWS;

  switch (tmp)
  {
    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock */
      SystemCoreClock = HSI_VALUE;
      break;
    case RCC_CFGR_SWS_HSE:  /* HSE used as system clock */
      SystemCoreClock = HSE_VALUE;
      break;
    case RCC_CFGR_SWS_PLL:  /* PLL used as system clock */
      /* Get PLL clock source and multiplication factor ----------------------*/
      pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
      pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
      pllmull = ( pllmull >> 18) + 2;
      predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;

      if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
      {
        /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */
        SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull;
      }
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
      else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV)
      {
        /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */
        SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull;
      }
#endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */
      else
      {
#if defined(STM32F042x6) || defined(STM32F048xx)  || defined(STM32F070x6) \
 || defined(STM32F078xx) || defined(STM32F071xB)  || defined(STM32F072xB) \
 || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx)  || defined(STM32F030xC)
        /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */
        SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull;
#else
        /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */
        SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
#endif /* STM32F042x6 || STM32F048xx || STM32F070x6 ||
          STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB ||
          STM32F091xC || STM32F098xx || STM32F030xC */
      }
      break;
    default: /* HSI used as system clock */
      SystemCoreClock = HSI_VALUE;
      break;
  }
  /* Compute HCLK clock frequency ----------------*/
  /* Get HCLK prescaler */
  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
  /* HCLK clock frequency */
  SystemCoreClock >>= tmp;
}

static void SetSysClock(void)
{
/******************************************************************************/
/*            PLL (clocked by HSI) used as System clock source                */
/******************************************************************************/

  /* At this stage the HSI is already enabled and used as System clock source */

  /* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/

    /* Enable Prefetch Buffer and set Flash Latency */
    FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;

     /* HCLK = SYSCLK / 1 */
     RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;

     /* PCLK = HCLK / 1 */
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;

  /* PLL configuration */
    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE ));
    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_DIV2 | RCC_CFGR_PLLXTPRE_Pos);

  /* Enable PLL */
  RCC->CR |= RCC_CR_PLLON;

  /* Wait till PLL is ready */
  while((RCC->CR & RCC_CR_PLLRDY) == 0)
  {
  }

  /* Select PLL as system clock source */
  RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
  RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;

  /* Wait till PLL is used as system clock source */
  while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
  {
  }
}



 
Posted : 19/08/2022 6:16 pm
admin
(@admin)
Posts: 8
Active Member Admin
 
Posted by: @iodo23

systme_clk(); //SystemInit();

why not call the system init directly ?

 
Posted : 26/08/2022 9:04 am
iodo23
(@iodo23)
Posts: 2
New Member
Topic starter
 

Hello! thanks for replying, SystemInit() is commented because I did some tests with SystemInit() and it didn't work, so I decided to make another function with the clock registers.

I am using STM32F0xx_Clock_Configuration_VX.Y.Z.xls, from the application note AN4055, where I configure with excel the clock for 48 mhz with HSI, I copy that file generated in SystemInit() but it does not work.

 
Posted : 26/08/2022 5:16 pm
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